cadence allegro17.2 从原理图向PCB导出设计时（export physical），报错，求大神解决。

Question

Error: Schematic supports automatically creating XNets using DML but the Layout will not automatically create any XNets. Change setting in Layout or Schematic, re-generate files, and re-run the flow.

Answer 1

Add the following to your <normally home folder>/PCBENV/ENV file:  set CDS_XNET_STATE_UI=1

Restart the tool and open Constraint Manager

In Constraint Manager, select Tools > Options and enable the option "Create XNets and Differential Pairs using DML Models "

Save the design to a new name and try running the flow again.

I intentionally stated to save the design to a new name so you have a back-up before making any changes running the flow. :-)

NOTE: If there are any XNets that are auto-generated in the design, without DML assignments, they will be removed after running the flow. (It sounds like you don't have any XNets anyway but I figured I would mention it)

Answer 2

下一次再导线路会不会自己更改现有的constraint设置呢？按照楼上的做法，已经可以导入线路了，但是怕后面还会有影响