机械类英语翻译（很急）

Question

急！急！非常急！麻烦各位英语牛人帮忙啊！！！翻译下面这几段的机械类的英语，在线等，在线等，急用！
要求： 要比较专业的翻译，不要用机器翻译的，谢谢啦~~~~~~

接4.1.1
The design consists of a digital structure development for a second-order difference equation. The design can be flexible since it can generate a reconfigurable structure in hardware to implement any equation in differences and thus, any filter or control law. Fig. 3 shows the general controller structure described under very high-speed integrated circuit hardware description language (VHDL),which is the language for digital design in a portable and manufacturer insensitive platform. Thanks to VHDL description, the design remains portable to any present and future implementation technology and allows an easy to perform reconfiguration for every digital structure without hardware modifications. The controller structures are: controller coefficients, sample coefficients, sample block, multiplier accumulator (MAC) and barrel shifter.
The main controller structure is a 36-bit MAC. This structure was designed through a multiplier, accumulator,adder and one finite state machine that has the multiplication and accumulation control of the difference equation; the structure was designed under VHDL.
The sample coefficient structure is in charge of sample shifting, so that they multiply with its respective coefficient in the difference equation. Its digital structure was made using a multiplexer pointed by an index and the registers.The digital structure that integrates the controller coefficient module is a read only memory (ROM) described under VHDL, containing the digital coefficient equivalent to the equation previously found through the tuning methods. The resolution of these coefficients is 36 bits.Both structures were designed under VHDL.
Fixed-point arithmetic was used for the controller computations and a barrel shifter has the task of decimal point adjustment at the result. The digital structure of this programmed module was based on a register with shifting.

4.1.2. Position feedback counter
The servomotor position is obtained from an optoelectronic position codifier (encoder). There, two quadrature square pulse waveforms are generated to determine the motion direction; the quantity of pulses delivers the absolute position. But those waveforms cannot be received directly by the digital controller; they should be processed by a digital structure that gives the absolute position count at the encoder and use it to take control actions. A digital counter is the main block for the position encoder that gives the absolute position with a 32-bit resolution. Other digital structure is the synchronization register, used to avoid errors at the encoder inputs signals. Fig. 4 shows the block diagram of this structure.

Answer 1

FPGA实现
该控制法在这工作的实施是一个标准的PID。该算法是类似（Galil运动运动）将在本节中的商业开发板所用的1。这项工作的主要贡献是通过一个地区高效FPGA实现高速数字结构。在FPGA器件的发展，使取得如DSP或微控制器的其他处理器比较高（伺服回路更新时间）采样率。另一方面，FPGA的集成性和便携性是非常适合硬件设计的互补结构，如配置文件生成，计数器，反馈系统接口是在同一个SoC技术的嵌入式集成电路，重要的，而需要单独DSP或微控制器并专门为这些外设逻辑。这也是必须注意的是FPGA的可重构，这意味着，每当一个数字上的内部结构修饰是必需的，对PID控制算法，甚至重大的修改，额外的控制结构时，PID控制是不够的，可以做到不改变由FPGA上的软件一样通过硬件描述语言的重新配置硬件。虽然DSP可以通过软件实现的控制算法中的变化，处理器的连续性质不能保证高采样率时，算法需要更多的计算周期，而FPGA的没有，由于其固有的并行结构的问题。 4.1。控制器的硬件设计
4.1.1。 PID的硬件
在这项工作中开发的设计进行了一些控制，如在法律一般可重构硬件控制器的目的：比例（P）的，比例积分（PI）的，比例，微分（PD）的，比例积分导数（ PID控制），铅过滤器，过滤器和滞后导致滞后的过滤器。前面提到的所有法律，以更高的采样率允许更高的分辨率。该法律对这些控制的硬件设计，开发了基于数字上的一个关于二阶无限脉冲响应分歧方程（原居民）过滤显示（1），其中b和a是可以改变根据具体控制常系数法律中，x（k）为激励和y（k）是系统的输出：
（公式省略）